This section lists classes that are no longer being maintained by Xilinx. Most of them have been incorporated in other classes. However, if you would like a custom class similar to the legacy course descriptions below, please contact Morgan Advanced Programmable Systems, Inc.
- CSP-22000: Debugging Techniques Using the ChipScope Pro Tools (ISE 14.2)
- CONN-13000: How to Design a Xilinx Connectivity System in 1 Day (2013.2)
- CONN-EMAC: Designing with Ethernet MAC Controllers (2014.3)
- CONN-MGTUS: Designing with UltraScale FPGA Transceivers (2015.3)
- CONN-MGT: Designing with Multi-Gigabit Serial IO (2015.1)
- CONN-MIF: How to Design a High-Speed Memory Interface (2015.1)
- CONN-PCIE-PROT: PCIe Protocol Overview
- CONN-SI: Signal Integrity and Board Design for Xilinx FPGAs (2012.4)
- DSP-13000: How to Design a Xilinx Digital Signal Processing System in 1 Day (ISE 13.1)
- DSP-22000: C-based HLS Coding for Hardware Designers (2012.2)
- DSP-23000: C-based HLS Coding for Software Designers (2012.2)
- DSP-ESS: Essential DSP Implementation Techniques for Xilinx FPGAs (All, but please call)
- EMBD-uPS: Essentials of Microprocessors
- EMBD-12000: C Language Programming with SDK (2014.1)
- EMBD-ADVHW: Advanced Features and Techniques of Embedded Systems Design (2017.3)
- EMBD-ADVSDSOC: Advanced SDSoC Development Environment and Methodology (2017.4)
- EMBD-ADVSW: Advanced Features and Techniques of Embedded Systems Software Design (2017.3)
- EMBD-AWS: Developing AWS F1 Applications Using the SDAccel Environment (2017.4)
- EMBD-OCLSDA: Developing and Optimizing Applications Using the OpenCL Framework for FPGAs (2018.3)
- EMBD-SDSOC: SDSoC Development Environment and Methodology (2018.3)
- EMBD-SZS01: Zynq Smarter Solutions Decision Maker 1 Day Seminar (2015.1)
- EMBD-SZS01: Zynq Smarter Solutions Decision Maker half-day Seminar (2015.1)
- FPGA-22000: Advanced Design with the PlanAhead Analysis and Design Tool (ISE 14.7)
- FPGA-24000: FPGA Power Optimization (2014.3)
- FPGA-33000: Advanced FPGA Implementation (ISE 14.7)
- FPGA-VATT: Advanced Tools and Techniques of the Vivado Design Suite (2015.3)
- FPGA-VDF: Vivado Design Suite Tool Flow (2015.3)
- FPGA-VSTAXDC: Vivado Design Suite Static Timing Analysis and Xilinx Design Constraints (2015.3)
- FPGA-VLA: Debugging Techniques Using the Vivado Logic Analyzer (2015.3)
- ISM-11000: Industrial Motor Control Using FPGAs and SoCs (ISE 14.2)
- MILAE10000: TMRTool (ISE 7.1)
- S6V6-21000: Designing with the Spartan-6 and Virtex-6 Families (ISE 13.1)
- S6-21000: Designing with the Spartan-6 Family (ISE 13.1)
- VIVA-12000: Vivado Design Suite Hands-on Introductory Workshop (2014.1)