Course Schedule (updated frequently)
Date Course City State Register Description
April 2019
Apr 25-26 C-based Design: High-Level Synthesis with the Vivado HLx Tool (DSP-HLS) Online Online Full Description
Apr 25-26 C-based Design: High-Level Synthesis with the Vivado HLx Tool (DSP-HLS) Orono (Minneapolis) MN Full Description
Apr 25-26 DSP Design Using System Generator (DSP-SYSGEN) Omaha NE Closed Description
Apr 29-30 Verification with SystemVerilog (LANG-SVVER) Orono (Minneapolis) MN Full Description
Apr 29-29 Essentials of Microprocessors (EMBD11000) Springfield IL Full Description
May 2019
May 6-7 Designing with SystemVerilog (LANG-SVDES) Schaumburg IL Register Description
May 6-7 Designing with SystemVerilog (LANG-SVDES) Online Online Register Description
May 8-9 Zynq UltraScale+ MPSoC for the System Architect (EMBD-ZUPSA) Overland Park KS Register Description
May 13-15 STA, XDC, and Advanced Tools and Techniques of Vivado Design Suite (FPGA-STAXDCADV) Schaumburg IL Register Description
May 16-17 Zynq UltraScale+ MPSoC for the System Architect (EMBD-ZUPSA) Schaumburg IL Register Description
May 20-21 Designing with the Zynq UltraScale+ RFSoC (CONN-RFSOC) Overland Park KS Register Description
May 22-24 Zynq Master Training for Experienced FPGA Engineers (EMBD-33040) Schaumburg IL Register Description
May 27-28 C-based Design: High-Level Synthesis with the Vivado HLx Tool (DSP-HLS) Orono (Minneapolis) MN Register Description
May 27-28 C-based Design: High-Level Synthesis with the Vivado HLx Tool (DSP-HLS) Online Online Register Description
May 29-31 Zynq Master Training for Experienced FPGA Engineers (EMBD-33040) Orono (Minneapolis) MN Register Description
May 29-31 Zynq Master Training for Experienced FPGA Engineers (EMBD-33040) Online Online Register Description
June 2019
Jun 3-5 Designing with VHDL (LANG-VHDL) Orono (Minneapolis) MN Register Description
Jun 3-5 Designing with VHDL (LANG-VHDL) Online Online Register Description
Jun 6-7 Advanced VHDL (LANG-ADVVHDL) Schaumburg IL Register Description
Jun 6-7 Advanced VHDL (LANG-ADVVHDL) Online Online Register Description
Jun 10-11 Designing with the Zynq UltraScale+ RFSoC (CONN-RFSOC) Schaumburg IL Register Description
Jun 12-14 Designing with Verilog (LANG-VERILOG) Schaumburg IL Register Description
Jun 12-14 Designing with Verilog (LANG-VERILOG) Online Online Register Description
Jun 17-19 STA, XDC, and Advanced Tools and Techniques of Vivado Design Suite (FPGA-STAXDCADV) Schaumburg IL Register Description
Jun 20-21 Zynq UltraScale+ MPSoC for the System Architect (EMBD-ZUPSA) Schaumburg IL Register Description
Jun 24-25 Designing FPGAs Using the Vivado Design Suite 1 (FPGA-VDES1) Orono (Minneapolis) MN Register Description
Jun 24-25 Designing FPGAs Using the Vivado Design Suite 1 (FPGA-VDES1) Online Online Register Description
Jun 27-28 Designing with SystemVerilog (LANG-SVDES) Orono (Minneapolis) MN Register Description
July 2019
Jul 1-2 Designing with the Zynq UltraScale+ RFSoC (CONN-RFSOC) Orono (Minneapolis) MN Register Description
Jul 1-2 Designing with the Zynq UltraScale+ RFSoC (CONN-RFSOC) Online Online Register Description
Jul 3-5 Designing with VHDL (LANG-VHDL) Schaumburg IL Register Description
Jul 3-5 Designing with VHDL (LANG-VHDL) Online Online Register Description
Jul 8-9 Designing with the Zynq UltraScale+ RFSoC (CONN-RFSOC) Schaumburg IL Register Description
Jul 8-9 Designing with the Zynq UltraScale+ RFSoC (CONN-RFSOC) Online Online Register Description

Student Cancellation Policy

  • Students cancellations received more than 7 days before the first day of class are entitled to a 100% refund. Refunds will be processed within 14 days.
  • Student cancellations received less than 7 days before the first day of class are entitled to a 100% credit toward a future class.
  • Student cancellations must be sent here.

Course Cancellation Policy

  • We regret from time to time classes will need to be rescheduled or cancelled.
  • In the event of cancellation, live on-line training may be offered as a substitute.
  • Morgan Advanced Programmable Systems, Inc. may cancel a class up to 7 days before the scheduled start date of the class; all students will be entitled to a 100% refund.
  • Under no circumstances is Morgan Advanced Programmable Systems, Inc. responsible or liable for travel, lodging or other incidental costs. Please be aware of this cancellation policy when making your arrangements.
  • For additional information or to schedule a private class contact us here.