State of the art Xilinx FPGAs with DSP48s allow state of the art Digital Signal Processing at performance levels that were difficult to imagine even five years ago.
- CONN-RFSOC: Designing with the Zynq UltraScale+ RFSoC
- DSP-ESS: Essential DSP Implementation Techniques for Xilinx FPGAs (All, but please call)
- DSP-HLS: C-based Design: High-Level Synthesis with the Vivado HLx Tool
- DSP-SYSGEN: DSP Design Using System Generator
The following courses are legacy. They are not in the schedule; however, they can be scheduled by special arrangement.
- EMBD-AWS: Developing AWS F1 Applications Using the SDAccel Environment (2017.4)
- DSP-13000: How to Design a Xilinx Digital Signal Processing System in 1 Day (ISE 13.1)
- ISM-11000: Industrial Motor Control Using FPGAs and SoCs (ISE 14.2)
- DSP-22000: C-based HLS Coding for Hardware Designers (2012.2)
- DSP-23000: C-based HLS Coding for Software Designers (2012.2)
- EMBD-SDSOC: SDSoC Development Environment and Methodology (2018.3)
- EMBD-ADVSDSOC: Advanced SDSoC Development Environment and Methodology